Time and time again over the last 30 years, physical limitations have appeared to put a stop to Moore’s Law and looked certain to prevent the shrinking of devices any further. Every time ASML has proved this wrong.
Now we’re preparing to introduce the most innovative semiconductor technology yet, and the most complex machines ever used in semiconductor manufacturing. ASML is developing a next-generation Extreme Ultra-Violet (EUV) platform that increases the numerical aperture from 0.33 NA to 0.55 (‘High-NA’). This platform has a novel optics design and significantly faster stages. It will enable geometric chip scaling beyond the next decade, offering a resolution capability that is 70% better than our current EUV platform. The High-NA platform has been designed to enable multiple future nodes, starting at the 3 nm Logic node and followed by Memory nodes at similar density
As Head of our Customer Support team in the US, I’m incredibly proud to be part of the High-NA EUV journey, and work with the fearless, committed and immensely talented people who are enabling the next generation of chips for the world.
Our customers are counting on us to make this technology available for wafer exposures as soon as possible, which means putting the right team in place at ASML: trained, capable and ready to support high availability. It’s an exciting opportunity for experienced engineers to head over and work alongside our development teams, get their hands on the very first components in our test lab, and familiarize themselves with the technology that’s about to revolutionize our industry – again!
Read more from our High-NA team below.
What is your role in the progression of High-NA at ASML?
I joined the Extended EUV business line as High-NA Project Cluster Manager (PCM) for Intel, also known as Customer PCM. I’m responsible for ensuring the overall success of the platform for the customer, ranging from preparation for system receipt, to the successful launch into high volume manufacturing.
I’ve been working with the team in Veldhoven for two years now and had the opportunity to be a part of the first system build and integration. I’ve also worked closely with the team on the early learnings and challenges, all invaluable for making the platform successful at the customer site.
Why are you so proud to be on this team?
It is quite an inspiring sight to watch the progress of the system build, from the first metal moving into the cleanroom, though to the construction of such an impressive piece of engineering. In addition, the passion and drive of the multidisciplinary team, and pull from large customers really makes me proud to be a part of the team.
How is High-NA going to shape the future of the semiconductor industry?
High-NA is poised to hit the ground running and enable rapid customer value realization. Essentially, it enables the next big step in scaling, keeping Moore’s law alive and well for nodes to come!
0.33 NA EUV technology was revolutionary when introduced, and had significant technological hurdles, both within the system and the ecosystem to support patterning. High-NA is taking advantage of the learnings from the 0.33 NA EUV fleet and ensuring improvements are made in all aspects, from reliability and serviceability to performance and productivity.
With the enhanced imaging capabilities of the 0.55 NA EUV system, patterning strategies can be simplified while transistor scaling continues, enabling higher yield and lower cost pre transistor. It allows scaling in an efficient manner but reduces integrated process defects and offers a lower cost of manufacturing.
What is your role on the High-NA team?
I’m the Global Account Manager for Intel. With my team and the High-NA Business Line, I crafted the proposal to convince Intel to commit to introducing High-NA in High Volume Manufacturing.
Tell us some of the challenges you’ve faced so far in driving the technology into manufacturing by 2025?
High-NA is going to happen because there are people at Intel, ASML and other suppliers who believe in the good this will bring. They are optimistic about clearing the hurdles we will undoubtedly encounter along the way. However, such a huge innovation is not without risks.
It takes creativity to deal with all the uncertainties in the program and assuring the customer that we will fix the unforeseen problems takes more than just our own enthusiasm – it takes trust between ASML and Intel that we can pull this off. For both of us, there is no plan B.
What impact will High-NA technology have on the world at large?
Over time lithography has made chips faster, more energy efficient and more affordable. EUV and High-NA are the latest steps in this evolution. Without High-NA you would not see chips speed up, and you would see increases in energy consumption and increases in prices. In other words, with High-NA we will continue to make computing power affordable to everyone. Everything is affected, from cars, to phones, to various domestic appliances and more – the list is endless!
What part do you play in the progression of High-NA at ASML?
I’m the Head of US Customer Support Applications. The ‘application’ (aka the usage of the ASML technology in the customer specific IC process node) of High-NA for the USA is part of my scope. My team will drive the applications requirements of this new technology in the field, as well as its readiness for High Volume Manufacturing (HVM) based on the learnings of the early introduction and process integration.
As Intel will be one of the early adopters of High-NA into their advanced process node, we are working with the Intel equipment and process owners to enable the introduction of the new features that come with the platform. We drive the Intel-specific use-cases to be supported by the platform and its control loops, and enable the on-product performance.
What is the most rewarding thing about being on this team?
- MAKE. IT. HAPPEN. There’s only one company that is able to lift this off from an equipment eco-system viewpoint – ASML. And only a few semiconductor manufacturers can implement this so early in their advanced nodes – Intel being one of them. So this is the ultimate collaboration.
Being in the field close to the customer, you are the overall integrator and evaluator of all those collaborative developments once it comes to showtime. That’s a magic role. I’m proud to be part of this, as well as humbled by the tremendous responsibilities that come with it.
How is High-NA going to positively affect the global ecosystem on the whole?
High-NA will not only shape the semiconductor industry by a continued process node shrink, it will also enable any human advancement that is based on data and calculations. For the same number of calculations/instructions, chipsets created with High-NA for the most critical layers in an Imaging Control (IC) manufacturing process will consume far less energy than our current chipsets.
For example, looking back from 2010 to 2018, the computing output of data centers increased six-fold, while only growing 6% in energy consumption to ~1% of all global worldwide energy used. Similar effects would apply going forward. The amount of energy required in our ever- increasing data-driven world ( automotive, data centers, big data driven fabs, artificial intelligence, augmented reality etc.) would have a dramatic impact on the global ecosystem and global warming without High-NA.
What is your role in the progression of High-NA at ASML?
As Global Technology Manager, my role is to drive the alignment of the ASML Product Roadmap to the Intel Technology Development Roadmap. We need to ensure we are delivering lithography scanners that will enable Intel to meet their roadmap requirements.
This includes High-NA EUV (Extreme Ultraviolet Light). Intel has publicly announced that they plan to be first to market for High-NA products by Q1 2025, which is a big challenge, but also a big opportunity for ASML to drive the High-NA program forwards.
How will customers benefit from using this technology and creating the next generation of chips?
High-NA will enable the continuation of smaller features supporting Moore’s Law while ensuring a competitive Patterning Cost of Technology on future nodes.
ASML customers today are using our 0.33NA EUV (Low NA) systems in HVM to enable the continuation of Moore’s Law. The other major benefit EUV has delivered is a node-over-node reduction in the Patterning Cost of Technology (PCoT).
As features continue to scale to smaller dimensions, customers are forced to implement multi-patterning EUV which adds both process complexity and higher cost – this was the same challenge with DUV that helped drive the adoption of EUV in leading edge fabs by reducing 2x, 4x or more DUV layers into a single EUV layer.
High-NA provides the ability to deliver that same technology, with a cost benefit by eliminating multi-patterning 0.33NA EUV with single layer 0.55NA (High-NA) EUV.
What’s the most exciting aspect of your job?
I am proud to be a part of a company whose tools are critical to the manufacture of every advanced computer chip in today’s digital world. As we look to the future with things like advanced computing, AI, Autonomous Driving Vehicles, gaming with advanced graphics, virtual reality and more, High-NA will be playing a key role. It will enable the design and manufacture of the semiconductor devices needed to support all of these exciting applications.
With High-NA, we are working hard to drive the next decade of computer chip advancement – what CNBC called “the most technologically advanced tool ever built by mankind”. Being a part of that story is exhilarating and an excellent career opportunity for anyone looking to be at the absolute cutting-edge of technology.